dangerous: resize width field on Operand
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6dff42cfa5
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SHA256:bB1qbbqmDXZNT0KKD5c2Dfjg53JGhj7B3CFcLIzSqq8
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@ -213,11 +213,11 @@ codegen_arg_to_operand:
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xor rax, rax
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mov eax, 0 ; Operand.len = 0
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shl eax, 16
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or eax, 8 ; Operand.width = 8
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shl eax, 4
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or eax, edi ; Operand.register
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or eax, 8 ; Operand.width = 8
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shl eax, 8
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or eax, OPERAND_REGISTER ; Operand.kind
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or eax, edi ; Operand.register
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shl eax, 8
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or eax, OPERAND_REGISTER ; Operand.kind
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mov rdx, 0 ; Operand.value = 0
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jmp .epilogue
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@ -233,8 +233,8 @@ codegen_arg_to_operand:
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xor rax, rax
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mov eax, 0 ; Operand.len = 0
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shl eax, 16
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or eax, 8 ; Operand.width = 8
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shl eax, 4
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or eax, 8 ; Operand.width = 8
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shl eax, 8
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; or eax, 0 ; Operand.register = undef
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shl eax, 8
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or eax, OPERAND_RBP_OFFSET ; Operand.kind
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@ -352,7 +352,7 @@ codegen_allocate_place:
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mov eax, 0 ; Operand.len = 0
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shl eax, 16
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or eax, esi ; Operand.width
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shl eax, 4
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shl eax, 8
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; or eax, 0 ; Operand.register = undef
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shl eax, 8
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or eax, OPERAND_RBP_OFFSET ; Operand.kind
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@ -393,7 +393,7 @@ codegen_allocate_value:
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shl eax, 16
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mov rsi, [rsp + 8] ; width
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or eax, esi ; Operand.width
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shl eax, 4
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shl eax, 8
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or eax, ebx ; Operand.register
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shl eax, 8
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or eax, OPERAND_REGISTER ; Operand.kind
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@ -435,17 +435,13 @@ codegen_free_operand:
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cmp rbx, rax
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jne .done ; operand not at top of stack, can't free
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mov al, byte [rsi + 1] ; Operand.width
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shr al, 4
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movzx rax, al
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movzx rax, word [rsi + 2] ; Operand.width
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sub rbx, rax
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mov dword [rdi + 0], ebx ; current_stack_size -= width
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jmp .done
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.free_reg:
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xor rax, rax
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mov al, byte [rsi + 1] ; Operand.register_and_width
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and al, 0x0F ; get register index
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movzx rax, byte [rsi + 1] ; Operand.register
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mov bx, word [rdi + 48] ; register_bitset
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btr bx, ax
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jnc .panic ; trying to free unallocated register
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@ -1055,14 +1051,7 @@ codegen_expr:
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call vec_extend
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; construct return operand
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; Operand { kind: REGISTER, register_and_width: (register | (width << 4)), len: 0, value: 0 }
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mov eax, 0 ; len = 0
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shl eax, 16
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or eax, 8 ; width = 8
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shl eax, 4
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or eax, 0 ; register = rax
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shl eax, 8
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or eax, OPERAND_REGISTER ; kind
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mov rax, [rel OPERAND_RAX]
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mov rdx, 0 ; value = 0
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jmp .done
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@ -1071,10 +1060,9 @@ codegen_expr:
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mov [rsp + 16], rax ; scratch = *AstNode
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mov byte [rsp + 32], OPERAND_IMMEDIATE ; Operand.kind
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mov bl, 8 ; width = 8
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shl bl, 4 ; register = undef
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mov byte [rsp + 33], bl ; Operand.register_and_width
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mov word [rsp + 34], 0 ; Operand.len = 0
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mov byte [rsp + 33], 0 ; Operand.register = undef
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mov word [rsp + 34], 8 ; Operand.width = 8
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mov word [rsp + 36], 0 ; Operand.len = 0
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mov rbx, [rax + 8] ; AstNode.data
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mov [rsp + 40], rbx ; Operand.value
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@ -1166,10 +1154,10 @@ codegen_expr:
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lea rsi, [rsp + 48] ; right operand
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call codegen_free_operand
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mov rdx, [rsp + 48] ; right operand
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and rdx, 0xF000 ; Operand.width
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; move scratch to rhs, but preserve width
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movzx rdx, word [rsp + 48 + 2] ; rhs.width
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mov word [rsp + 64 + 2], dx ; scratch.width
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mov rax, [rsp + 64] ; scratch value
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or rax, rdx ; preserve width
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mov rdx, [rsp + 72]
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mov [rsp + 48], rax ; right operand
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mov [rsp + 56], rdx
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@ -1332,7 +1320,7 @@ codegen_expr:
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call vec_get
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mov rdx, [rax + 8] ; offset
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neg rdx
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mov rax, qword [rel OPERAND_RBP_OFFSET]
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mov rax, qword [rel OPERAND_RBP]
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mov [rsp + 16], rax
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mov [rsp + 24], rdx
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@ -1372,7 +1360,8 @@ codegen_expr:
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;; start-structs
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;; struct Operand {
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;; kind: u8
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;; register_and_width: u8,
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;; register: u8,
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;; width: u16,
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;; len: u16,
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;; value: u64,
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;; }
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@ -1387,12 +1376,22 @@ section .rdata
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OPERAND_IMMEDIATE equ 5 ; e.g. 0x10
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OPERAND_CONSTANT equ 6 ; e.g. OPERAND_CONSTANT
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OPERAND_LABEL equ 7 ; e.g. label_1234
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OPERAND_REGISTER_PLACE equ 8 ; e.g. [rax]
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OPERAND_RBP_PLACE equ 9 ; e.g. mov rax, [rbp - 8]; mov [rax], src
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;; end-consts
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WIDTH_BYTE db 'byte '
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WIDTH_WORD db 'word '
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WIDTH_DWORD db 'dword '
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WIDTH_QWORD db 'qword '
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; Operand { kind: REGISTER, register: 0, width: 8, len: 0, padding: 0, value: 0 }
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align 8
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OPERAND_RAX dq 0x0008_0001, 0
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align 8
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OPERAND_RDX dq 0x0008_0301, 0
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align 8
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OPERAND_RBP dq 0x0008_0002, 0
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section .text
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;; rdi: *text
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@ -1424,14 +1423,39 @@ codegen_write_operand:
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je .constant
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cmp bl, OPERAND_LABEL
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je .label
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cmp bl, OPERAND_REGISTER_PLACE
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je .reg_p
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cmp bl, OPERAND_RBP_PLACE
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je .rbp_offset
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jmp .panic
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.reg_p:
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mov rbx, rsi
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mov byte [rsp + 16], '['
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mov rdi, [rsp] ; *text
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lea rsi, [rsp + 16]
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call vec_push
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movzx rdi, byte [rbx + 1] ; Operand.register
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movzx rsi, word [rbx + 2] ; Operand.width
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lea rdx, [rsp + 16] ; buffer
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call get_register_name
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mov rdi, [rsp] ; *text
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mov rsi, rax ; buffer
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call vec_extend
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mov byte [rsp + 16], ']'
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mov rdi, [rsp] ; *text
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lea rsi, [rsp + 16]
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call vec_push
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.register:
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mov rbx, rsi
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mov rdi, [rbx + 1] ; register_and_width
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mov rsi, rdi
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and dil, 0x0F ; low 4 bits = register
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shr rsi, 4 ; high 4 bits = width
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movzx rdi, byte [rbx + 1] ; Operand.register
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movzx rsi, word [rbx + 2] ; Operand.width
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lea rdx, [rsp + 16] ; buffer
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call get_register_name
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@ -1444,8 +1468,7 @@ codegen_write_operand:
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.rsp_offset:
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; {width} [rbp {+/-} offset]
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mov rsi, [rsp + 8] ; op
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mov sil, byte [rsi + 1] ; Operand.register_and_width
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shr sil, 4 ; width
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movzx rsi, word [rsi + 2] ; Operand.width
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mov rdi, [rsp] ; *text
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call codegen_write_width
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mov rbx, rax
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@ -1521,8 +1544,8 @@ codegen_write_operand:
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; write address name
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mov rax, [rsp + 8] ; op
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mov rdi, [rsp] ; *text
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mov rsi, [rax + 8] ; op.value
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mov rdx, [rax + 2] ; op.len
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mov rsi, [rax + 8] ; Operand.value
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mov rdx, [rax + 4] ; Operand.len
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mov dx, dx ; low 16 bits
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call vec_extend
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@ -1607,10 +1630,10 @@ codegen_move_rbp_slot_src:
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; construct dst Operand
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mov byte [rsp + 0], OPERAND_RBP_OFFSET ; Operand.kind
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mov byte [rsp + 1], 0x80 ; Operand.register_and_width (width=8)
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mov word [rsp + 2], 0 ; Operand.len = 0
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mov dword [rsp + 4], 0 ; padding
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mov qword [rsp + 8], rdx ; Operand.value = rbp offset
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mov byte [rsp + 1], 0 ; Operand.register = undef
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mov word [rsp + 2], 8 ; Operand.width = 8
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mov word [rsp + 4], 0 ; Operand.len = 0
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mov qword [rsp + 8], rdx ; Operand.value = rbp offset
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mov rdx, rsi
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lea rsi, [rsp + 0] ; dst
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@ -1849,19 +1872,17 @@ codegen_move_dst_src:
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jg .panic ; unsupported dst kind
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; if dst.width != src.width
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mov cl, byte [rsi + 1] ; dst.register_and_width
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mov bl, byte [rdx + 1] ; src.register_and_width
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shr cl, 4
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shr bl, 4
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cmp cl, bl
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mov cx, word [rsi + 2] ; dst.width
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mov bx, word [rdx + 2] ; src.width
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cmp cx, bx
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jne .panic ; mismatched widths
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; if dst.width == 8 && src.kind == OPERAND_ADDRESS
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xor rbx, rbx
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cmp cl, 8
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cmovne rbx, [rdx + 0]
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cmp bl, OPERAND_ADDRESS
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je .panic ; address can only be moved to full-sized destinations
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; ; if dst.width == 8 && src.kind == OPERAND_ADDRESS
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; xor rbx, rbx
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; cmp cx, 8
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; cmovne rbx, [rdx + 0]
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; cmp bl, OPERAND_ADDRESS
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; je .panic ; address can only be moved to full-sized destinations
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cmp byte [rsi + 0], OPERAND_REGISTER
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je .do_move ; if dst == register, do move
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@ -1935,11 +1956,3 @@ section .rdata
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MUL_ dq "mul "
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DIV_ dq "div "
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; Operand { kind: REGISTER, register: 0, width: 8, len: 0, padding: 0, value: 0 }
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align 8
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OPERAND_RAX dq 0x0000_8001, 0
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align 8
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OPERAND_RDX dq 0x0000_8301, 0
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align 8
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OPERAND_RBP_OFFSET dq 0x0000_8002, 0
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@ -64,6 +64,8 @@ pub const OPERAND_ADDRESS: u32 = 4;
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pub const OPERAND_IMMEDIATE: u32 = 5;
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pub const OPERAND_CONSTANT: u32 = 6;
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pub const OPERAND_LABEL: u32 = 7;
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pub const OPERAND_REGISTER_PLACE: u32 = 8;
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pub const OPERAND_RBP_PLACE: u32 = 9;
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pub const TOKEN_EOF: u8 = 0;
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pub const TOKEN_LET: u8 = 1;
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pub const TOKEN_IF: u8 = 2;
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@ -247,7 +249,8 @@ pub struct FunctionCtx {
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#[derive(Debug)]
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pub struct Operand {
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pub kind: u8,
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pub register_and_width: u8,
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pub register: u8,
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pub width: u16,
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pub len: u16,
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pub value: u64,
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}
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