diff --git a/src/triples.rs b/src/triples.rs
index cd21da7..9c3f3fa 100644
--- a/src/triples.rs
+++ b/src/triples.rs
@@ -666,7 +666,7 @@ impl core::fmt::Display for RegisterDisplay {
             Registers::R15 => "r15",
         };
 
-        write!(f, "%{prefix}{name}{suffix}")
+        write!(f, "{prefix}{name}{suffix}")
     }
 }
 
@@ -744,7 +744,7 @@ impl StackMem {
 
 impl core::fmt::Display for StackMem {
     fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
-        write!(f, "-{}(%rbp)", self.offset)
+        write!(f, "[rbp - 0x{:x}]", self.offset)
     }
 }
 
@@ -758,8 +758,8 @@ enum ImmRegMem {
 impl core::fmt::Display for ImmRegMem {
     fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
         match self {
-            ImmRegMem::ImmU32(v) => write!(f, "{v}"),
-            ImmRegMem::ImmU64(v) => write!(f, "{v}"),
+            ImmRegMem::ImmU32(v) => write!(f, "0x{v:x}"),
+            ImmRegMem::ImmU64(v) => write!(f, "0x{v:x}"),
             ImmRegMem::Mem(mem) => write!(f, "{mem}"),
             ImmRegMem::Reg(reg, width) => write!(f, "{}", reg.display(*width)),
         }
@@ -783,8 +783,8 @@ impl Function {
             writeln!(w, "push {}", reg.display(Width::QWord))?;
         }
 
-        writeln!(w, "push %rbp")?;
-        writeln!(w, "mov %rsp, %rbp")?;
+        writeln!(w, "push rbp")?;
+        writeln!(w, "mov rbp, rsp")?;
 
         write!(w, "{}", self.entry)?;
 
@@ -799,8 +799,8 @@ impl Function {
         }
 
         writeln!(w, "{}__epilogue:", self.name)?;
-        writeln!(w, "mov %rbp, %rsp")?;
-        writeln!(w, "pop %rbp")?;
+        writeln!(w, "mov rsp, rbp")?;
+        writeln!(w, "pop rbp")?;
 
         for reg in self.used_registers.iter().rev() {
             writeln!(w, "pop {}", reg.display(Width::QWord))?;
@@ -898,7 +898,7 @@ impl<'a> Assembler<'a> {
                     let reg = register_store.take_any().unwrap();
                     writeln!(
                         func.branches.get_mut(&current_branch).unwrap(),
-                        "mov ${value}, {}",
+                        "mov {}, {value}",
                         reg.display(Width::DWord)
                     )?;
                     registers.insert(reg, node);
@@ -914,7 +914,7 @@ impl<'a> Assembler<'a> {
                     let reg = register_store.take_any().unwrap();
                     writeln!(
                         func.branches.get_mut(&current_branch).unwrap(),
-                        "mov ${value}, {}",
+                        "mov {}, {value}",
                         reg.display(Width::QWord)
                     )?;
                     registers.insert(reg, node);
@@ -933,7 +933,7 @@ impl<'a> Assembler<'a> {
                 Inst::Alloca => {
                     let (size, align) = data.unwrap().as_lhs_rhs();
                     let size = size.next_multiple_of(align);
-                    writeln!(&mut func.entry, "sub ${size}, %rsp")?;
+                    writeln!(&mut func.entry, "sub rsp, 0x{size:x}")?;
                     stack_offset += size;
                     allocas.insert(node, stack_offset);
                 }
@@ -957,27 +957,28 @@ impl<'a> Assembler<'a> {
                         ImmRegMem::Reg(_, _) => {
                             writeln!(
                                 func.branches.get_mut(&current_branch).unwrap(),
-                                "mov ({}), {}",
-                                src,
+                                "mov {}, [{}]",
                                 dst_reg.display(Width::from_size(ty.size()).unwrap()),
+                                src,
                             )?;
                         }
-                        _ => {
+                        ImmRegMem::Mem(ref mem) => {
                             let tmp_reg = register_store.take_any().unwrap();
                             writeln!(
                                 func.branches.get_mut(&current_branch).unwrap(),
                                 "mov {}, {}",
-                                src,
                                 tmp_reg.display(Width::QWord),
+                                mem,
                             )?;
                             writeln!(
                                 func.branches.get_mut(&current_branch).unwrap(),
-                                "mov ({}), {}",
-                                tmp_reg.display(Width::QWord),
+                                "mov {}, [{}]",
                                 dst_reg.display(Width::from_size(ty.size()).unwrap()),
+                                tmp_reg.display(Width::QWord),
                             )?;
                             register_store.free(tmp_reg);
                         }
+                        _ => {}
                     }
 
                     if let ImmRegMem::Reg(reg, _) = src {
@@ -1015,8 +1016,8 @@ impl<'a> Assembler<'a> {
                     writeln!(
                         func.branches.get_mut(&current_branch).unwrap(),
                         "mov {}, {}",
-                        src,
                         dst,
+                        src,
                     )?;
 
                     if let ImmRegMem::Reg(reg, _) = src {
@@ -1044,8 +1045,8 @@ impl<'a> Assembler<'a> {
                         writeln!(
                             func.branches.get_mut(&current_branch).unwrap(),
                             "lea {}, {}",
-                            src,
                             ImmRegMem::Reg(dst_reg, Width::QWord),
+                            src,
                         )?;
                     }
 
@@ -1053,8 +1054,7 @@ impl<'a> Assembler<'a> {
                     if offset != 0 {
                         writeln!(
                             func.branches.get_mut(&current_branch).unwrap(),
-                            "lea {}({}), {}",
-                            offset,
+                            "lea {}, [{} + {offset}]",
                             ImmRegMem::Reg(dst_reg, Width::QWord),
                             ImmRegMem::Reg(dst_reg, Width::QWord),
                         )?;
@@ -1081,8 +1081,8 @@ impl<'a> Assembler<'a> {
                     writeln!(
                         func.branches.get_mut(&current_branch).unwrap(),
                         "add {}, {}",
-                        src_reg.display(Width::from_size(ty.size()).unwrap()),
                         dst_reg.display(Width::from_size(ty.size()).unwrap()),
+                        src_reg.display(Width::from_size(ty.size()).unwrap()),
                     )?;
 
                     if src_reg != dst_reg {
@@ -1109,8 +1109,8 @@ impl<'a> Assembler<'a> {
                     writeln!(
                         func.branches.get_mut(&current_branch).unwrap(),
                         "sub {}, {}",
-                        src,
                         dst_reg.display(Width::from_size(ty.size()).unwrap()),
+                        src,
                     )?;
 
                     if let ImmRegMem::Reg(reg, _) = src {
@@ -1139,8 +1139,8 @@ impl<'a> Assembler<'a> {
                     writeln!(
                         func.branches.get_mut(&current_branch).unwrap(),
                         "imul {}, {}",
-                        src,
                         dst_reg.display(Width::from_size(ty.size()).unwrap()),
+                        src,
                     )?;
 
                     if let ImmRegMem::Reg(reg, _) = src {
@@ -1167,7 +1167,7 @@ impl<'a> Assembler<'a> {
                         ));
                     writeln!(
                         func.branches.get_mut(&current_branch).unwrap(),
-                        "mov {}, %rax\njmp {}__epilogue",
+                        "mov rax, {}\njmp {}__epilogue",
                         reg.display(Width::QWord),
                         func.name
                     )?;
@@ -1210,6 +1210,8 @@ impl<'a> Assembler<'a> {
     }
 
     fn finish<W: core::fmt::Write>(&self, w: &mut W) -> core::fmt::Result {
+        writeln!(w, ".intel_syntax")?;
+        writeln!(w, ".text")?;
         for func in self.functions.iter() {
             writeln!(w, ".globl {}", func.name)?;
         }
@@ -1618,6 +1620,7 @@ impl<'a> MirBuilder<'a> {
                     mir.gen_ret_val(src)
                 }
                 Inst::Return => mir.gen_ret(),
+                #[allow(unreachable_patterns)]
                 _ => {
                     unimplemented!()
                 }