fix warnings
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parent
9194e35851
commit
ad6a9b00ec
13
src/mir.rs
13
src/mir.rs
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@ -721,6 +721,7 @@ impl NodeRef {
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fn exclusive_start(self) -> (Self, Self) {
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(self, Self::MAX)
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}
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#[allow(dead_code)]
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fn inclusive_end(self) -> (Self, Self) {
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(self, Self::MAX)
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}
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@ -1256,27 +1257,27 @@ impl Mir {
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let (lhs, rhs) = data.as_binary();
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writeln!(w, "%{node} = cmp {ty} %{lhs} {ty} %{rhs}")
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}
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Inst::IsEq(ty) => {
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Inst::IsEq(_) => {
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let lhs = data.as_node();
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writeln!(w, "%{node} = is eq %{lhs}")
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}
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Inst::IsNeq(ty) => {
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Inst::IsNeq(_) => {
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let lhs = data.as_node();
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writeln!(w, "%{node} = is neq %{lhs}")
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}
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Inst::IsGt(ty) => {
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Inst::IsGt(_) => {
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let lhs = data.as_node();
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writeln!(w, "%{node} = is gt %{lhs}")
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}
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Inst::IsLt(ty) => {
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Inst::IsLt(_) => {
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let lhs = data.as_node();
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writeln!(w, "%{node} = is lt %{lhs}")
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}
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Inst::IsGe(ty) => {
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Inst::IsGe(_) => {
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let lhs = data.as_node();
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writeln!(w, "%{node} = is ge %{lhs}")
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}
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Inst::IsLe(ty) => {
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Inst::IsLe(_) => {
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let lhs = data.as_node();
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writeln!(w, "%{node} = is le %{lhs}")
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}
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@ -1250,12 +1250,12 @@ impl<'a> Assembler<'a> {
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allocas.insert(node, stack_offset);
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registers.insert(param_reg, node);
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}
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Inst::Eq(ty)
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| Inst::Neq(ty)
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| Inst::Gt(ty)
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| Inst::Lt(ty)
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| Inst::Ge(ty)
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| Inst::Le(ty) => {}
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Inst::Eq(_)
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| Inst::Neq(_)
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| Inst::Gt(_)
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| Inst::Lt(_)
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| Inst::Ge(_)
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| Inst::Le(_) => {}
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Inst::Add(ty) => {
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let (src, dst) = data.unwrap().as_lhs_rhs();
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let (&src_reg, _) = registers.iter().find(|(_, node)| node == &&src).unwrap();
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